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Physical IC Design Engineer at Morse Micro

Job Description

Surry Hills, NSW · Full Time · Hardware Engineer

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Are you a physical IC design engineer with a broad experience in taking RTL to GDS-II at cutting edge technology nodes? Do you want to play a key role in building next-generation Wi-Fi chips that will truly enable the Internet of Things? Keen to make a real difference in a VC-backed startup and work in a dynamic & fun environment?
Then join Australia’s fastest growing semiconductor startup based in Sydney, Australia! You’ll work with the team that invented Wi-Fi 20 years ago, and help shape the future of Wi-Fi.

You will be the first in-house physical IC design engineer and will be responsible for setting up a low power PnR & sign off flow. You will work closely and iteratively with the digital design engineers to ensure best-possible power and performance QoR, and help ensure design correctness through to tapeout. 

As Physical IC Design Engineer, your responsibilities would include

  • Owning the RTL to GDS-II flow
  • Developing and running of PnR and timing signoff flow
  • Maintenance and running of synthesis and DFT flow
  • Manage overseas PnR contractors 
  • Interacting with the frontend and analog teams to get the design through to tapeout whilst meeting performance and power metrics
  • Assist with gate-level digital and AMS chip verification
  • Providing overall technical expertise and brilliance

Essential skills (you must have)

  • BSc or MSc in Electrical / Electronics Engineering or Computer Science
  • ASIC design engineer with 5+ years of relevant industry experience
  • A deep understanding of digital design fundamentals including low power and multi-clock-domain design for mass-produced, mixed-signal chips
  • Expert user of: Cadence Innovus or Synopsys IC Compiler for backend, Cadence Tempus or Synopsys PrimeTime for timing signoff, and Cadence Voltus or Synopsys PrimePower for power signoff
  • Basic user of: Mentor Tessent, Cadence Modus or Synopsys Testmax for DFT and Cadence Genus or Synopsys Design Compiler for synthesis
  • Experience with: ECO implementation flows, low power UPF / CPF flows, and scripting languages such as Perl or, Python
    • Revision control systems such as git or svn
    • Linux development environment incl shell, make, etc
  • Industry experience with advanced mixed-signal technology nodes
  • Excellent verbal and written communication skills
  • Ability to document - and keep updated - instructions on running and debugging flows
  • Strong analytical and problem-solving skills
  • A determination to deliver even when subject to time pressures
  • A hands-on, practical attitude

Bonus skills (these will make you stand out in your application)

  • Experience managing a small team of backend engineers
  • Gate-level verification in Cadence ncsim or Synopsys VCS
  • RTL coding in SystemVerilog, Verilog or VHDL

Who we are

Morse Micro is a fabless semiconductor company building Wi-Fi HaLow (802.11ah) chips for the Internet of Things (IoT). We are a team of wireless experts that love to innovate & invent. Together, we are building the world’s lowest power Wi-Fi technology that will enable billions of IoT devices to connect securely to the internet. Today we are a team of thirty-six based in Sydney & Picton (Australia) and Irvine, CA, Boston, MA (USA) and Hangzhou, China. We will be growing significantly in the next two years, expanding into more overseas offices.

What we offer

  • Competitive salary + excellent stock option package
  • Potential to sponsor a long term work visa for the right candidate
  • Healthy work environment with sit/stand desks and large screens
  • Office perks such as stocked drinks fridge, snack bar and barista coffee
  • Newly fitted-out offices, with a relaxed, friendly work environment

How to apply
If you are interested in building the first fully-integrated 802.11ah chipset together with the inventors of Wi-Fi, then send us your resume and application letter via the application form or to careers@morsemicro.com.

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About Morse Micro

Office address

  • 63 Foveaux Street, Surry Hills, NSW, 2010

Company size

11-50 people

Founded in

2016

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